You are hereNovocell's Innovative SmartBit Technology

Novocell's Innovative SmartBit Technology


built with Smartbit

SmartBit Diagram

The Novocell SmartBit™ cell generates and confines the breakdown voltage entirely in the memory core allowing the unprogrammed cells to have the native reliability of the process while only the programmed cells see high voltage.

To ensure that a programmed cell has achieved hard breakdown, Smartbit applies the high voltage until it detects the current signature of hard breakdown. 100 percent programmability and data retention are guaranteed.

Smartbit avoids the data retention issues associated with floating gate designs. Unlike polysilicon or laser fuses, it is possible to route over IP based upon Smartbit IP, thus consuming no additional chip area.

For more information on Novocell's Smartbit™ bit cell and sensing technology, and how it creates a distinct advantage for your antifuse OTP NVM, download this whitepaper.


Would you like more information on Novocell's Smartbit OTP? 

Download the printable technology brief or
REGISTER for a no-obligation webinar.

PARTNERSHIP PROGRAMS

IBM Ready for IBM Technology - Foundry logo

Supported Foundries:

TowerJazz

TSMC

IBM Logo

UMC

GlobalFoundries

SilTerra

Novocell Smartbit™ OTP Memory IP significantly reduces costs by implementing highly reliable antifuse technology in standard logic CMOS, without additional process steps.

The entire Smartbit-based OTP family avoids the data retention issues associated with floating gate memory. Unlike polysilicon or laser fuses, it is possible to route over Novobits, NovoBytes and NovoHD, thus consuming no additional chip area.

With the Novocell Smartbit design, our anti-fuse oxide breakdown high voltage is contained entirely within the bit cell itself, and supports programming at wafer, in package, or in circuit.

Learn more by downloading our detailed product information briefs and specifications PDF or contact us for a tailored presentation today!